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1 LTC1545 software-selectable multiprotocol transceiver d2 d1 LTC1545 rts dtr dsr dcd cts d3 r2 r1 r3 d2 ltc1543 ll ri tm rl txd scte txc rxc rxd 2 *optional 14 24 11 15 12 17 9 3 1 4 19 20 623 22 5 13 8 10 18 * 21 25 7 16 1545 ta01 ltc1344a d3 r2 r1 r3 d1 txd a (103) txd b scte a (113) scte b rxc a (115) rxc b rxd a (104) rxd b rts a (105) rts b dtr a (108) dtr b cts a (106) sg (102) shield (101) db-25 connector txc a (114) txc b dcd a (107) dcd b dsr a (109) dsr b d4 d5 r4 ll a (141) ri a (125) tm a (142) rl a (140) cts b r5 dte or dce multiprotocol serial interface with db-25 connector , ltc and lt are registered trademarks of linear technology corporation. n data networking n csu and dsu n data routers n software-selectable transceiver supports: rs232, rs449, eia530, eia530-a, v.35, v.36, x.21 n tuv/detecon inc. certified net1 and net2 compliant (test report no. net2/071601/98) n tbr2 compliant (test report no. ctr2/071601/98) n software-selectable cable termination using the ltc1344a n complete dte or dce port with ltc1543, ltc1344a n operates from single 5v supply with ltc1543 the ltc ? 1545 is a 5-driver/5-receiver multiprotocol trans- ceiver. the LTC1545 and ltc1543 form the core of a complete software-selectable dte or dce interface port that supports the rs232, rs449, eia530, eia530-a, v.35, v.36 or x.21 protocols. cable termination may be implemented using the ltc1344a software-selectable cable termination chip or by using existing discrete designs. the LTC1545 runs from a 5v supply and the charge pump on the ltc1543. the part is available in a 36-lead ssop surface mount package. features descriptio u applicatio s u typical applicatio u
2 LTC1545 absolute m axi m u m ratings w ww u package/order i n for m atio n w u u order part number (note 1) supply voltage v cc ..................................................................... 6.5v v ee ........................................................ C 10v to 0.3v v dd ....................................................... C 0.3v to 10v input voltage transmitters ........................... C 0.3v to (v cc + 0.3v) receivers ............................................... C 18v to 18v logic pins .............................. C 0.3v to (v cc + 0.3v) output voltage transmitters .................. (v ee C 0.3v) to (v dd + 0.3v) receivers ................................ C 0.3v to (v cc + 0.3v) short-circuit duration transmitter output ..................................... indefinite receiver output .......................................... indefinite v ee .................................................................. 30 sec operating temperature range LTC1545c .............................................. 0 c to 70 c LTC1545i ........................................... C 40 c to 85 c storage temperature range ................ C 65 c to 150 c lead temperature (soldering, 10 sec)................. 300 c LTC1545cg LTC1545ig electrical characteristics 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 top view 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 v cc v dd d1 d2 d3 r1 r2 r3 d4 r4 m0 m1 m2 dce/dte d4enb r4en r5 d5 v ee gnd d1 a d1 b d2 a d2 b d3/r1 a d3/r1 b r2 a r2 b r3 a r3 b d4 a r4 a r5 a d5 a v dd v cc r1 d2 d1 d3 r3 g package 36-lead plastic ssop d5 r5 d4 r2 r4 t jmax = 150 c, q ja = 65 c/ w consult factory for military grade parts. the l denotes specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25 c. v cc = 5v, v dd = 8v, v ee = C 7v for v.28, C 5.5v for v.10, v.11 (notes 2, 3) symbol parameter conditions min typ max units supplies i cc v cc supply current (dce mode, rs530, rs530-a, x.21 modes, no load l 2.7 5 ma all digital pins = gnd or v cc ) rs530, rs530-a, x.21 modes, full load l 110 150 ma v.28 mode, no load l 13 ma v.28 mode, full load l 13 ma no-cable mode, d4enb = high l 10 500 m a i ee v ee supply current (dce mode, rs530, rs530-a, x.21 modes, no load l 2.0 4.0 ma all digital pins = gnd or v cc ) rs530, x.21 modes, full load l 23 35 ma rs530-a, full load l 34 50 ma v.28 mode, no load l 13 ma v.28 mode, full load l 12 18 ma no-cable mode, d4enb = high l 10 500 m a i dd v dd supply current (dce mode, rs530, rs530-a, x.21 modes, noload l 0.3 2 ma all digital pins = gnd or v cc ) rs530, rs530-a, x.21 modes, full load l 0.3 2 ma v.28 mode, no load l 13 ma v.28 mode, full load l 13.5 18 ma no-cable mode, d4enb = high l 10 500 m a p d internal power dissipation (dce mode, rs530, rs530-a, x.21 modes, full load 340 mw (all digital pins = gnd or v cc ) v.28 mode, full load 64 mw
3 LTC1545 electrical characteristics the l denotes specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25 c. v cc = 5v, v dd = 8v, v ee = C 7v for v.28, C 5.5v for v.10, v.11 (notes 2, 3) symbol parameter conditions min typ max units logic inputs and outputs v ih logic input high voltage l 2v v il logic input low voltage l 0.8 v i in logic input current d1, d2, d3, d4, d5 l 10 m a m0, m1, m2, dce, d4enb, r4en = gnd (LTC1545c) l C 100 C 50 C 30 m a m0, m1, m2, dce, d4enb, r4en = gnd (LTC1545i) l C 120 C 50 C 30 m a m0, m1, m2, dce, d4enb, r4en = v cc l 10 m a v oh output high voltage i o = C 4ma l 3 4.5 v v ol output low voltage i o = 4ma l 0.3 0.8 v i osr output short-circuit current 0v v o v cc l C50 40 50 ma i ozr three-state output current m0 = m1 = m2 = v cc , 0v v o v cc 1 m a v.11 driver v odo open circuit differential output voltage r l = 1.95k (figure 1) l 5v v odl loaded differential output voltage r l = 50 w (figure 1) 0.5v odo 0.67v odo r l = 50 w (figure 1) l 2v d v od change in magnitude of differential r l = 50 w (figure 1) l 0.2 v output voltage v oc common mode output voltage r l = 50 w (figure 1) l 3v d v oc change in magnitude of common mode r l = 50 w (figure 1) l 0.2 v output voltage i ss short-circuit current v out = gnd 150 ma i oz output leakage current C 0.25v v o 0.25v, power off or l 1 100 m a no-cable mode or driver disabled t r , t f rise or fall time LTC1545c (figures 2, 5) l 21525 ns LTC1545i (figures 2, 5) l 21535 ns t plh input to output LTC1545c (figures 2, 5) l 20 40 65 ns LTC1545i (figures 2, 5) l 20 40 75 ns t phl input to output LTC1545c (figures 2, 5) l 20 40 65 ns LTC1545i (figures 2, 5) l 20 40 75 ns d t input to output difference, ? t plh C t phl ? LTC1545c (figures 2, 5) l 0312 ns LTC1545i (figures 2, 5) l 0317 ns t skew output to output skew (figures 2, 5) 3 ns v.11 receiver v th input threshold voltage C 7v v cm 7v l C 0.2 0.2 v d v th input hysteresis C 7v v cm 7v l 15 40 mv i in input current (a, b) C 10v v a,b 10v l 0.66 ma r in input impedance C 10v v a,b 10v l 15 30 k w t r , t f rise or fall time (figures 2, 6) 15 ns t plh input to output LTC1545c (figures 2, 6) l 50 80 ns LTC1545i (figures 2, 6) l 50 90 ns t phl input to output LTC1545c (figures 2, 6) l 50 80 ns LTC1545i (figures 2, 6) l 50 90 ns d t input to output difference, ? t plh C t phl ? LTC1545c (figures 2, 6) l 0416 ns LTC1545i (figures 2, 6) l 0421 ns
4 LTC1545 electrical characteristics note 1: absolute maximum ratings are those values beyond which the life of a device may be impaired. note 2: all currents into device pins are positive; all currents out of device are negative. all voltages are referenced to device ground unless otherwise specified. note 3: all typicals are given for v cc = 5v, v dd = 8v, v ee = C 7v for v.28, C 5.5v for v.10, v.11 and t a = 25 c. symbol parameter conditions min typ max units v.10 driver v o output voltage open circuit, r l = 3.9k l 4 6v v t output voltage r l = 450 w (figure 3) l 3.6 v r l = 450 w (figure 3) 0.9v o i ss short-circuit current v o = gnd 150 ma i oz output leakage current C 0.25v v o 0.25v, power off or l 0.1 100 m a no-cable mode or driver disabled t r , t f rise or fall time r l = 450 w , c l = 100pf (figures 3, 7) 2 m s t plh input to output r l = 450 w , c l = 100pf (figures 3, 7) 1 m s t phl input to output r l = 450 w , c l = 100pf (figures 3, 7) 1 m s v.10 receiver v th receiver input threshold voltage l C 0.25 0.25 v d v th receiver input hysteresis l 25 50 mv i in receiver input current C 10v v a 10v l 0.66 ma r in receiver input impedance C 10v v a 10v l 15 30 k w t r , t f rise or fall time (figures 4, 8) 15 ns t plh input to output (figures 4, 8) 55 ns t phl input to output (figures 4, 8) 109 ns d t input to output difference, ? t plh C t phl ? (figures 4, 8) 60 ns v.28 driver v o output voltage open circuit l 10 v r l = 3k (figure 3) l 5 8.5 v i ss short-circuit current v o = gnd l 150 ma i oz output leakage current C 0.25v v o 0.25v, power off or l 1 100 m a no-cable mode or driver disabled sr slew rate r l = 3k, c l = 2500pf (figures 3, 7) l 430v/ m s t plh input to output r l = 3k, c l = 2500pf (figures 3, 7) l 1.3 2.5 m s t phl input to output r l = 3k, c l = 2500pf (figures 3, 7) l 1.3 2.5 m s v.28 receiver v thl input low threshold voltage l 1.5 0.8 v v tlh input high threshold voltage l 2 1.6 v d v th receiver input hysterisis l 0.1 0.3 v r in receiver input impedance C 15v v a 15v l 357 k w t r , t f rise or fall time (figures 4, 8) 15 ns t plh input to output (figures 4, 8) l 60 100 ns t phl input to output (figures 4, 8) l 150 450 ns the l denotes specifications which apply over the full operating temperature range, otherwise specifications are at t a = 25 c. v cc = 5v, v dd = 8v, v ee = C 7v for v.28, C 5.5v for v.10, v.11 (notes 2, 3)
5 LTC1545 v cc (pins 1, 19): positive supply for the transceivers. 4.75v v cc 5.25v. connect a 1 m f capacitor to ground. v dd (pins 2, 20): positive supply voltage for v.28. con- nect to v dd pin 3 on ltc1543 or 8v supply. connect a 1 m f capacitor to ground. d1 (pin 3): ttl level driver 1 input. d2 (pin 4): ttl level driver 2 input. d3 (pin 5): ttl level driver 3 input. r1 (pin 6): cmos level receiver 1 output. r2 (pin 7): cmos level receiver 2 output. r3 (pin 8): cmos level receiver 3 output. d4 (pin 9): ttl level driver 4 input. r4 (pin 10): cmos level receiver 4 output. m0 (pin 11): ttl level mode select input 0 with pull-up to v cc . m1 (pin 12): ttl level mode select input 1 with pull-up to v cc . m2 (pin 13): ttl level mode select input 2 with pull-up to v cc . dce/dte (pin 14): ttl level mode select input with pull-up to v cc . logic high enables driver 3. logic low enables receiver 1. d4enb (pin 15): ttl level enable input with pull-up to v cc . logic low enables driver 4. r4en (pin 16): ttl level enable input with pull-up to v cc . logic high enables receiver 4. pi n fu n ctio n s uuu r5 (pin 17): cmos level receiver 5 output. d5 (pin 18): ttl level driver 5 input. d5 a (pin 21): driver 5 output. r5 a (pin 22): receiver 5 input. r4 a (pin 23): receiver 4 input. d4 a (pin 24): driver 4 input. r3 b (pin 25): receiver 3 noninverting input. r3 a (pin 26): receiver 3 inverting input. r2 b (pin 27): receiver 2 noninverting input. r2 a (pin 28): receiver 2 inverting input. d3/r1 b (pin 29): receiver 1 noninverting input and driver 3 noninverting output. d3/r1 a (pin 30): receiver 1 inverting input and driver 3 inverting output. d2 b (pin 31): driver 2 noninverting output. d2 a (pin 32): driver 2 inverting output. d1 b (pin 33): driver 1 noninverting output. d1 a (pin 34): driver 1 inverting output. gnd (pin 35): ground. v ee (pin 36): negative supply voltage. connect to v ee pin 26 on ltc1543. connect a 1 m f capacitor to ground. figure 1. v.11 driver test circuit figure 2. v.11 driver/receiver ac test circuit a b 1545 f01 v od v oc r l r l a b a r b 1545 f02 r l 100 c l 100pf c l 100pf 15pf test circuits
6 LTC1545 test circuits figure 3. v.10/v.28 driver test circuit a d 1545 f03 r l c l a d 1545 f04 15pf r a figure 4. v.10/v.28 receiver test circuit (note 1) (note 2) (note 1) (note 3) LTC1545 mode name m2 m1 m0 d1 d2 d3 d4 d5 r1 r2 r3 r4 r5 not used (default v.11) 0 0 0 v.11 v.11 v.11 v.10 v.10 v.11 v.11 v.11 v.10 v.10 rs530a 0 0 1 v.11 v.10 v.11 v.10 v.10 v.11 v.10 v.11 v.10 v.10 rs530 0 1 0 v.11 v.11 v.11 v.10 v.10 v.11 v.11 v.11 v.10 v.10 x.21 0 1 1 v.11 v.11 v.11 v.10 v.10 v.11 v.11 v.11 v.10 v.10 v.35 1 0 0 v.28 v.28 v.28 v.28 v.28 v.28 v.28 v.28 v.28 v.28 rs449/v.36 1 0 1 v.11 v.11 v.11 v.10 v.10 v.11 v.11 v.11 v.10 v.10 v.28/rs232 1 1 0 v.28 v.28 v.28 v.28 v.28 v.28 v.28 v.28 v.28 v.28 d4enb = 1, r4en = 0 111zzzzzzzzzz m0 = m1 = m2 = 1 ode selectio w u note 1: driver 3 and receiver 1 are enabled (and disabled) by dce/dte (pin 14). logic high enables driver 3. logic low enables receiver 1. note 2: driver 4 is enabled by d4enb = 0 (pin 15). note 3: receiver 4 is enabled by r4en = 1 (pin 16). switchi g ti e wavefor s uw w figure 5. v.11 driver propagation delays 5v 1.5v 1.5v 50% 10% 90% t plh t r 0v v o v o ? o d b ?a a b t phl t skew t skew 1545 f05 1/2 v o f = 1mhz : t r 10ns : t f 10ns v diff = v(b) ?v(a) 50% 10% 90% t f
7 LTC1545 switchi g ti e wavefor s uw w figure 6. v.11 receiver propagation delays applicatio n s i n for m atio n wu u u overview the ltc1543/LTC1545 form the core of a complete soft- ware-selectable dte or dce interface port that supports the rs232, rs449, eia530, eia530-a, v.35, v.36 or x.21 protocols. cable termination may be implemented using the ltc1344a software-selectable cable termination chip or by using existing discrete designs. a complete dce-to-dte interface operating in eia530 mode is shown in figure 9. the ltc1543 of each port is used to generate the clock and data signals. the LTC1545 is used to generate the control signals along with ll (local loop-back), rl (remote loop-back), tm (test mode) and ri (ring indicate). the ltc1344a cable termination chip is used only for the clock and data signals because they must support v.35 cable termination. the control signals do not need any external resistors. mode selection the interface protocol is selected using the mode select pins m0, m1 and m2 (see the mode selection table). for example, if the port is configured as a v.35 interface, the mode selection pins should be m2 = 1, m1 = 0, m0 = 0. for the control signals, the drivers and receivers will operate in v.28 (rs232) electrical mode. for the clock and data signals, the drivers and receivers will operate in v.35 electrical mode. the dce/dte pin will configure the port for dce mode when high, and dte when low. the interface protocol may be selected simply by plugging the appropriate interface cable into the connector. the mode pins are routed to the connector and are left uncon- nected (1) or wired to ground (0) in the cable as shown in figure 10. v ih v il 1.5v 1.5v 1.5v 1.5v t phl v oh v ol a r t plh 1545 f08 figure 8. v.10, v.28 receiver propagation delays 3v 0v 1.5v 0v ?v 3v 1.5v 0v 3v ?v t phl t f v o ? o d a t plh t r 1545 f07 figure 7. v.10, v.28 driver propagation delays v od2 ? od2 0v 1.5v 0v 1.5v t plh v oh v ol b ?a r t phl 1545 f06 f = 1mhz : t r 10ns : t f 10ns input output
8 LTC1545 applicatio n s i n for m atio n wu u u ltc1543 dce dte ltc1543 ltc1344a ltc1344a 1545 f09 d3 d3 r1 103 w 103 w 103 w r3 LTC1545 d3 d4 d2 r1 r2 r3 ll tm ri rl txc rxc rxd txd scte txc rxc rxd serial controller d2 103 w scte r2 d1 103 w txd r3 r1 d2 d1 LTC1545 r2 r1 r3 d2 d1 d4 d5 txd scte txc rxc rxd rts dtr dcd dsr cts ll tm rts dtr dcd dsr cts rts dtr dcd dsr cts ll tm ri rl ri rl serial controller r2 r4 d3 r4 r5 d5 r5 d1 the mode selection may also be accomplished by using jumpers to connect the mode pins to ground or v cc . cable termination traditional implementations have included switching resistors with expensive relays, or required the user to change termination modules every time the interface standard has changed. custom cables have been used the internal pull-up current sources will ensure a binary 1 when a pin is left unconnected and that the ltc1543/ LTC1545 and the ltc1344a enter the no-cable mode when the cable is removed. in the no-cable mode the ltc1543/LTC1545 supply current drops to less than 200 m a and all ltc1543/LTC1545 driver outputs and ltc1344a resistive terminations are forced into a high impedance state. figure 9. complete multiprotocol interface in eia530 mode
9 LTC1545 applicatio n s i n for m atio n wu u u figure 10: single port dce v.35 mode selection in the cable nc nc v cc cable 10k 1545 f10 11 12 13 14 ltc1543 LTC1545 connector 14 13 12 11 15 16 22 21 m2 m1 ltc1344a latch m0 (data) 23 24 1 (data) m0 m1 m2 dce/dte dce/dte m2 m1 m0 d4enb r4en (data) dce/ dte the v.10 receiver configuration in the LTC1545 is shown in figure 13. in v.10 mode switch s3 inside the LTC1545 is turned off. the noninverting input is disconnected inside the LTC1545 receiver and connected to ground.the cable termination is then the 30k input impedance to ground of the LTC1545 v.10 receiver. v.11 (rs422) interface a typical v.11 balanced interface is shown in figure 14. a v.11 differential generator with outputs a and b with ground c is connected to a differential receiver with ground c ' , inputs a ' connected to a, b ' connected to b. the v.11 interface has a differential termination at the receiver end that has a minimum value of 100 w . the termination resistor is optional in the v.11 specification, but for the high speed clock and data lines, the termination is required to prevent reflections from corrupting the data. the receiver inputs must also be compliant with the imped- ance curve shown in figure 12. with the termination in the cable head or separate termina- tions are built on the board and a custom cable routes the signals to the appropriate termination. switching the terminations with fets is difficult because the fets must remain off even though the signal voltage is beyond the supply voltage for the fet drivers or the power is off. using the ltc1344a along with the ltc1543/LTC1545 solves the cable termination switching problem. via soft- ware control, the ltc1344a provides termination for the v.10 (rs423), v.11 (rs422), v.28 (rs232) and v.35 electrical protocols. v.10 (rs423) interface a typical v.10 unbalanced interface is shown in figure 11. a v.10 single-ended generator output a with ground c is connected to a differential receiver with inputs a ' con- nected to a, and input c ' connected to the signal return ground c. usually, no cable termination is required for v.10 interfaces, but the receiver inputs must be compliant with the impedance curve shown in figure 12.
10 LTC1545 applicatio n s i n for m atio n wu u u figure 12. v.10 receiver input impedance figure 13. v.10 receiver configuration figure 14. typical v.11 interface r3 124 r5 20k ltc1344a ltc1543 LTC1545 receiver 1545 f15 a b a ' b ' c ' r1 51.5 r8 6k s2 s3 r2 51.5 r6 10k r7 10k gnd r4 20k s1 i z v z 10v ?.25ma 3.25ma ?v 3v 10v 1545 f12 r5 20k LTC1545 receiver 1545 f13 a b a ' b ' c ' r8 6k s3 r6 10k r7 10k gnd r4 20k aa ' b c b ' c ' generator balanced interconnecting cable load cable termination receiver 100 min 1545 f14 aa ' cc ' generator balanced interconnecting cable load cable termination receiver 1545 f11 figure 11. typical v.10 interface figure 15. v.11 receiver configuration in v.11 mode, all switches are off except s1 inside the ltc1344a which connects a 103 w differential termina- tion impedance to the cable as shown in figure 15. v.28 (rs232) interface a typical v.28 unbalanced interface is shown in figure 16. a v.28 single-ended generator output a with ground c is connected to a single-ended receiver with input a ' con- nected to a, ground c ' connected via the signal return ground c. in v.28 mode, all switches are off except s3 inside the ltc1543/LTC1545 which connects a 6k (r8) impedance to ground in parallel with 20k (r5) plus 10k (r6) for a combined impedance of 5k as shown in figure 17. the noninverting input is disconnected inside the ltc1543/ LTC1545 receiver and connected to a ttl level reference voltage for a 1.4v receiver trip point.
11 LTC1545 applicatio n s i n for m atio n wu u u figure 16. typical v.28 interface aa ' cc ' generator balanced interconnecting cable load cable termination receiver 1545 f16 v.35 interface requires a t or delta network termination at the receiver end and the generator end. the receiver differential impedance measured at the connector must be 100 w 10 w , and the impedance between shorted termi- nals (a ' and b ' ) and ground c ' must be 150 w 15 w . in v.35 mode, both switches s1 and s2 inside the ltc1344a are on, connecting the t network impedance as shown in figure 19. both switches in the ltc1543 are off. the 30k input impedance of the receiver is placed in parallel with the t network termination, but does not affect the overall input impedance significantly. the generator differential impedance must be 50 w to 150 w and the impedance between shorted terminals (a and b) and ground c must be 150 w 15 w . for the generator termination, switches s1 and s2 are both on and the top side of the center resistor is brought out to a pin so it can be bypassed with an external capacitor to reduce common mode noise as shown in figure 20. figure 20. v.35 driver using the ltc1344a v.35 driver a b c 51.5 s2 on s1 on 1545 f20 51.5 ltc1344a 124 c1 100pf r3 124 r5 20k ltc1344a ltc1543 receiver 1545 f19 a b a ' b ' c ' r1 51.5 r8 6k s2 s3 r2 51.5 r6 10k r7 10k gnd r4 20k s1 figure 19. v.35 receiver configuration v.35 interface a typical v.35 balanced interface is shown in figure 18. a v.35 differential generator with outputs a and b with ground c is connected to a differential receiver with ground c ' , inputs a ' connected to a, b ' connected to b. the figure 18. typical v.35 interface a a ' b c b ' c ' generator balanced interconnecting cable load cable termination receiver 1545 f18 50 125 50 50 125 50 figure 17. v.28 receiver configuration r3 124 r5 20k ltc1344a ltc1543 LTC1545 receiver 1545 f17 a b a ' b ' c ' r1 51.5 r8 6k s2 s3 r2 51.5 r6 10k r7 10k gnd r4 20k s1
12 LTC1545 applicatio n s i n for m atio n wu u u dte vs dce operation the dce/dte pin acts as an enable for driver 3/receiver 1 in the ltc1543, and driver 3/receiver 1 in the LTC1545. the ltc1543/LTC1545 can be configured for either dte or dce operation in one of two ways: a dedicated dte or dce port with a connector of appropriate gender, or a port with one connector that can be configured for dte or dce operation by rerouting the signals to the ltc1543/LTC1545 using a dedicated dte cable or dedicated dce cable. a dedicated dte port using a db-25 male connector is shown in figure 22. the interface mode is selected by logic outputs from the controller or from jumpers to either v cc or gnd on the mode select pins. a dedicated dce port using a db-25 female connector is shown in figure 23. a port with one db-25 connector, can be configured for either dte or dce operation is shown in figure 24. the configuration requires separate cables for proper signal routing in dte or dce operation. for example, in dte mode, the txd signal is routed to pins 2 and 14 via driver 1 in the ltc1543. in dce mode, driver 1 now routes the rxd signal to pins 2 and 14. compliance testing a european standard en 45001 test report is available for the ltc1343/LTC1545/ltc1344a chipset. a copy of the test report is available from ltc or tuv telecom services inc. (formerly detecon inc.) the title of the report is: test report no. net2/071601/98. the address of tuv telecom services inc. is: tuv telecom services inc. suite 107 1775 old highway 8 st. paul, mn 55112 usa tel. +1 (612) 639-0775 fax. +1 (612) 639-0873 any mismatch in the driver rise and fall times or skew in the driver propagation delays will force current through the center termination resistor to ground, causing a high frequency common mode spike on the a and b terminals. the common mode spike can cause emi problems that are reduced by capacitor c1 which shunts much of the com- mon mode energy to ground rather than down the cable. no-cable mode the no-cable mode (m0 = m1 = m2 = d4enb = 1, r4en = 0) is intended for the case when the cable is disconnected from the connector. the charge pump, bias circuitry, drivers and receivers are turned off, the driver outputs are forced into a high impedance state, and the supply current drops to less than 200 m a. charge pump the ltc1543 uses an internal capacitive charge pump to generate v dd and v ee as shown in figure 21. a voltage doubler generates about 8v on v dd and a voltage inverter generates about C 7.5v for v ee . four 1 m f surface mounted tantalum or ceramic capacitors are required for c1, c2, c3 and c4. the v ee capacitor c5 should be a minimum of 3.3 m f. all capacitors are 16v and should be placed as close as possible to the ltc1543 to reduce emi. the turn-on time for the charge pump is 60ms. 28 27 26 25 1545 f21 3 2 1 4 c3 1 f c4 1 f 5v c1 1 f c2 1 f c5 3.3 f ltc1543 v dd c1 + c1 v cc c2 + c2 v ee gnd + figure 21. charge pump receiver fail-safe all ltc1543/LTC1545 receivers feature fail-safe opera- tion in all modes. if the receiver inputs are left floating or shorted together by a termination resistor, the receiver output will always be forced to a logic high.
13 LTC1545 figure 22. controller-selectable multiprotocol dte port with db-25 connector 10 17 18 d2 d1 LTC1545 rts dtr dsr dcd cts d3 r2 r1 r3 d2 ltc1543 ll ri tm txd scte txc rxc rxd m0 m1 m2 dce/dte v cc v dd v cc 5v v ee gnd 2 21 14 24 11 15 12 17 9 3 1 4 19 20 8 23 10 6 22 5 13 18 25 * *optional 21 7 16 1544 f22 d3 r2 r1 r3 d1 c2 1 f c1 1 f c5 1 f c3 1 f c4 3.3 f txd a (103) txd b scte a (113) scte b rxc a (115) rxc b rxd a (104) rxd b rts a (105) rts b dtr a (108) dtr b cts a (106) cts b sg shield db-25 male connector txc a (114) txc b dcd a (109) dcd b dsr a (107) dsr b d4 16 10 9 7 6 4 3 8 11 12 13 5 2 15 18 17 19 20 22 ltc1344a latch c6 100pf c7 100pf c8 100pf v cc v cc 5v 23 24 14 1 dce/dte m2 m1 m0 charge pump + 28 3 1 2 4 5 6 7 8 9 10 11 12 13 14 1,19 2,20 3 4 5 6 7 8 9 r4en d4enb 15 16 24 23 22 25 26 27 28 29 30 31 32 33 nc 27 26 25 24 23 22 21 20 19 18 17 16 15 34 35 36 v ee m0 m1 m2 dce/dte m0 m1 m2 11 12 13 14 c12 1 f c13 1 f c11 1 f c10 1 f c9 1 f rl d5 21 r4 r5 ll (141) ri (125) tm (142) rl (140) typical applicatio n s u
14 LTC1545 typical applicatio n s u 10 17 18 d2 d1 LTC1545 d3 r2 r1 r3 v cc v dd v ee gnd d4 1,19 2,20 3 4 5 6 7 8 9 r4en d4enb 15 16 24 23 22 25 26 27 28 29 30 31 32 33 34 35 36 m0 m1 m2 dce/dte 11 12 13 14 d5 21 r4 r5 d2 ltc1543 rxd rxc txc scte txd cts dsr dcd dtr ri ll rts rl tm m0 m1 m2 dce/dte v cc 5v nc nc 3 16 17 9 15 12 24 11 2 1 5 13 6 8 22 10 20 23 4 19 7 14 1544 f23 d3 r2 r1 r3 d1 c2 1 f c1 1 f c5 1 f c3 1 f c4 3.3 f 16 10 9 7 6 4 3 8 11 12 13 5 2 15 18 17 19 20 22 ltc1344a c6 100pf c7 100pf c8 100pf v cc v cc v cc 5v 23 24 14 1 dce/dte m2 m1 m0 charge pump + 28 3 1 2 4 5 6 7 8 9 10 nc 11 12 13 14 27 26 25 24 23 22 21 20 19 18 17 16 15 v ee m0 m1 m2 21 latch c12 1 f c13 1 f c11 1 f c10 1 f c9 1 f rxd a (104) rxd b rxc a (115) rxc b scte a (113) scte b txd a (103) txd b txc a (114) txc b sgnd (102) shield (101) db-25 female connector cts a (106) cts b dsr a (107) dsr b rts a (105) rts b dcd a (109) dcd b dtr a (108) dtr b 18 * *optional 21 25 ll (141) rl (140) tm (142) ri (125) figure 23. controller-selectable dce port with db-25 connector
15 LTC1545 typical applicatio n s u figure 24. controller-selectable multiprotocol dte/dce port with db-25 connector 10 17 18 d2 d1 LTC1545 d3 r2 r1 r3 v cc v dd v ee gnd d4 1,19 2,20 3 4 5 6 7 8 9 r4en d4enb 15 16 nc 24 23 22 25 26 27 28 29 30 31 32 33 34 35 36 m0 m1 m2 dce/dte 11 12 13 14 d5 21 r4 r5 18 * *optional 21 25 ll ll rl rl tm tm ri ri d2 ltc1543 dte_txd/dce_rxd dte_txc/dce_txc dte_rxc/dce_scte dte_rxd/dce_txd dte_rts/dce_cts dte_dtr/dce_dsr dte_dcd/dce_dcd dte_dsr/dce_dtr dte_cts/dce_rts dte_ll/dce_ri dte_ri/dce_ll dte_tm/dce_rl dte_rl/dce_tm dte_scte/dce_rxc m0 m1 m2 dce/dte v cc 5v 2 14 24 11 15 12 17 9 3 1 4 19 20 8 23 10 6 22 5 13 7 16 1544 f24 d3 r2 r1 r3 d1 c2 1 f c1 1 f c5 1 f c3 1 f c4 3.3 f txd a txd b scte a scte b rxd a rxd b rxc a rxc b rxc a rxc b rxd a rxd b rts a rts b dtr a dtr b cts a cts b dsr a dsr b cts a cts b sg shield db-25 connector txc a txc b scte a scte b txd a txd b txc a txc b dcd a dcd b dsr a dsr b rts a rts b dcd a dcd b dtr a dtr b 16 10 9 7 6 4 3 8 11 12 13 5 2 15 18 17 19 20 22 ltc1344a c6 100pf c7 100pf c8 100pf v cc v cc 5v 23 24 14 1 dce/dte m2 m1 m0 charge pump + 28 3 1 2 4 5 6 7 8 9 10 11 12 13 14 27 26 25 24 23 22 21 20 19 18 17 16 15 v ee dce/dte m0 m1 m2 dte dce 21 latch c12 1 f c13 1 f c11 1 f c10 1 f c9 1 f information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
16 LTC1545 1545fa lt/tp 1199 2k rev a ? printed in usa ? linear technology corporation 1998 linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 l fax: (408) 434-0507 l www.linear-tech.com dimensions in inches (millimeters) unless otherwise noted. package descriptio n u g package 36-lead plastic ssop (0.209) (ltc dwg # 05-08-1640) g36 ssop 1098 0.13 ?0.22 (0.005 ?0.009) 0 ?8 0.55 ?0.95 (0.022 ?0.037) 5.20 ?5.38** (0.205 ?0.212) 7.65 ?7.90 (0.301 ?0.311) 1234 5 6 7 8 9 10 11 12 14 15 16 17 18 13 12.67 ?12.93* (0.499 ?0.509) 25 26 22 21 20 19 23 24 27 28 29 30 31 32 33 34 35 36 1.73 ?1.99 (0.068 ?0.078) 0.05 ?0.21 (0.002 ?0.008) 0.65 (0.0256) bsc 0.25 ?0.38 (0.010 ?0.015) note: dimensions are in millimeters dimensions do not include mold flash. mold flash shall not exceed 0.152mm (0.006") per side dimensions do not include interlead flash. interlead flash shall not exceed 0.254mm (0.010") per side * ** related parts part number description comments ltc1321 dual rs232/rs485 transceiver two rs232 driver/receiver pairs or two rs485 driver/receiver pairs ltc1322 dual rs232/rs485 transceiver four rs232 driver/receiver pairs or two rs485 driver/receiver pairs ltc1334 single 5v rs232/rs485 multiprotocol transceiver two rs232 driver/receiver pairs or four rs232 driver/receiver pairs ltc1335 dual rs232/rs485 transceiver four rs232 driver/receiver pairs or two rs485 driver/receiver pairs ltc1343 software-selectable multiprotocol transceiver 4-driver/4-receiver for data and clock signals ltc1344a software-selectable cable terminator perfect for terminating the ltc1543 ltc1345 single supply v.35 transceiver 3-driver/3-receiver for data and clock signals ltc1346a dual supply v.35 transceiver 3-driver/3-receiver for data and clock signals ltc1543 software-selectable multiprotocol transceiver companion to ltc1544/LTC1545 for data and clock signals ltc1544 software-selectable multiprotocol transceiver 4-driver/4-receiver for control signals ltc1387 single 5v rs232/rs485 multiprotocol transceiver two rs232 driver/receiver pairs or one rs485 driver/receiver pair

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